System Integration Validation Engineer

Altera

Penang, Malaysia
Not specified
Ic validation methodologies
Test and measurements for ic parameters
Verilog or system verilog knowledge
Altera is seeking a System Integration Validation Engineer in Penang, Malaysia, to develop and validate IP designs for integration into full chip designs, focusing on logic design and verification. The ideal candidate should possess knowledge in IC validation methodologies and experience in programming, with a focus on optimizing design integrity for power and performance goals

Job Summary

  • The role involves developing logic design and RTL coding to generate cell libraries and IP blocks for full chip designs.
  • Candidates must apply strategies to optimize logic for power, performance, area, and timing goals while ensuring design integrity.
  • The position requires supporting SoC customers to ensure high-quality integration and verification of the IP block.

Matching Summary

Match Score: 75

Altera is seeking a System Integration Validation Engineer in Penang, Malaysia, to develop and validate IP designs for integration into full chip designs, focusing on logic design and verification. The ideal candidate should possess knowledge in IC validation methodologies and experience in programming, with a focus on optimizing design integrity for power and performance goals.

Skills & Requirements

Must-have

  • IC validation methodologies
  • test and measurements for IC parameters
  • Verilog or System Verilog knowledge

Nice-to-have

  • FPGA architecture experience
  • Python, Tcl, C-programming skills
  • Experience with high speed test equipment

Key Requirements

  • Good knowledge in IC validation methodologies
  • Experience conducting test and measurements for IC timing/frequency/current/voltage parameters
  • Shift 1 availability in Penang, Malaysia

Work Rights

Not specified

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