Soc Physical Design And Sta Methodology Engineer

Samsung Semiconductor India Research (SSIR)

Bangalore, India
Soc physical design flow development
Python tcl perl unix scripting
Synopsys cadence pnr signoff tools
This role focuses on developing production-grade physical design flows and methodologies for advanced SoC architectures rather than just block implementation

Job Summary

  • This role focuses on developing production-grade physical design flows and methodologies for advanced SoC architectures rather than just block implementation.
  • Candidates must possess deep expertise in EDA automation using Python, Tcl, or Perl to optimize PPA and runtime for chip top-level designs.
  • The position requires strong fundamentals in static timing analysis, low-power design techniques like UPF, and the ability to support complex convergence issues across multiple projects.

Matching Summary

This role focuses on developing production-grade physical design flows and methodologies for advanced SoC architectures rather than just block implementation.

Skills & Requirements

Must-have

  • SoC Physical Design flow development
  • Python Tcl Perl UNIX scripting
  • Synopsys Cadence PnR signoff tools
  • STA constraints SDC timing debug
  • Low power UPF multi-voltage designs
  • ECO flows and hierarchical STA

Nice-to-have

  • AI-driven optimization tool experience
  • Advanced node DTCO exposure
  • Formal verification LEC methodology
  • Production-grade flow release experience
  • Cross-domain project collaboration

Key Requirements

  • 5 to 8 years of relevant experience
  • B.Tech/B.E/M.Tech/M.E degree qualification

Work Rights

Not specified

Tailored Resume

Cover Letter