Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing
Job Summary
Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Possesses hands on expertise in various process nodes full chip physical integration, system level place and route and system level verification signoff.
Matching Summary
Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
Skills & Requirements
Must-have
physical design flow
physical design signoff flow
deep submicron process nodes
EDA tools
scripting languages
hardware description languages
Nice-to-have
mentoring junior team members
strong initiative
analytical/problem solving skills
team working skills
ability to multitask
diverse team environment
Key Requirements
5+ years of relevant experience
multiple tape-out experience
Bachelor's degree in computer engineering, electronic Engineering or related field