Fpga Engineer R&d

Penn State University

State College, PA, US
Base: $76,700.00 - $164,000.00; bonus/equity: not ...
Hybrid
Experience designing and testing with fpgas
Proficiency in vhdl and/or verilog
Programming skills in matlab, python, or c++
Penn State University is seeking entry to senior-level FPGA engineers for their Applied Research Laboratory (ARL) in State College, PA and Reston, VA. The ideal candidates should possess strong FPGA design knowledge and a collaborative mindset to contribute to innovative research and development projects

Job Summary

  • The role involves designing real-time digital signal processing systems and optimizing signal processing algorithms using FPGAs.
  • Candidates must possess a solid understanding of advanced math and experience with prototyping in a Linux environment.
  • The position offers an excellent work/life balance, generous time-off policy, and 75% off Penn State tuition for employees and their families.

Matching Summary

Match Score: 85

Penn State University is seeking entry to senior-level FPGA engineers for their Applied Research Laboratory (ARL) in State College, PA and Reston, VA. The ideal candidates should possess strong FPGA design knowledge and a collaborative mindset to contribute to innovative research and development projects.

Salary

Base: $76,700.00 - $164,000.00; Bonus/Equity: Not specified; Benefits: 75% off tuition, generous time-off

Skills & Requirements

Must-have

  • Experience designing and testing with FPGAs
  • Proficiency in VHDL and/or Verilog
  • Programming skills in MATLAB, Python, or C++

Nice-to-have

  • Knowledge of cellular and wireless communications
  • Out-of-the-box creative thinking for solutions
  • Collaboration with research teams on algorithms

Key Requirements

  • Bachelor's degree in Engineering or Science
  • U.S. citizenship required
  • Successful completion of background check and drug screen

Work Rights

Must be a U.S. citizen

Tailored Resume

Cover Letter