Design Verification Engineer

Broadcom

Usa, United States
Base: $141,300 - $226,000; bonus/equity: eligible ...
System verilog and uvm expertise
Rtl verification methodologies
Asic design verification flows
The ASIC Product Division in Broadcom is seeking qualified individuals for SoC and IP development programs

Job Summary

  • The ASIC Product Division in Broadcom is seeking qualified individuals for SoC and IP development programs.
  • The engineer will be responsible for advanced verification tasks including environment development and test case creation.
  • Broadcom offers a competitive benefits package including medical, dental, and 401(K) participation.

Matching Summary

The ASIC Product Division in Broadcom is seeking qualified individuals for SoC and IP development programs.

Salary

Base: $141,300 - $226,000; Bonus/Equity: Eligible for discretionary annual bonus; Benefits: Comprehensive benefits package including medical and 401(K)

Skills & Requirements

Must-have

  • System Verilog and UVM expertise
  • RTL verification methodologies
  • ASIC design verification flows

Nice-to-have

  • Experience with Emulators and FPGA
  • Strong programming skills in C++
  • Familiarity with chip design methodologies

Key Requirements

  • Bachelor’s Degree in Electrical Engineering
  • 12+ years relevant industry experience
  • Legal authorization to work in the US

Work Rights

Not specified

Tailored Resume

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