Staff To Senior Staff Design Verification Engineer (ddr/lpddr/hbm)

Marvell Technology

Not specified in the job description.
4+ years in chip design verification
Proficient in system verilog and uvm
Experience with ddr/lpddr/hbm technologies
Marvell Technology is seeking a Staff to Senior Staff Design Verification Engineer with expertise in DDR/LPDDR/HBM technologies and strong skills in System Verilog. The role involves defining verification testbench architecture and collaborating with cross-functional teams to deliver leading-edge semiconductor solutions

Job Summary

  • Marvell’s semiconductor solutions are essential for data infrastructure.
  • The team focuses on high-performance data processing silicon platforms.
  • Employees enjoy competitive compensation and a collaborative work environment.

Matching Summary

Match Score: 85

Marvell Technology is seeking a Staff to Senior Staff Design Verification Engineer with expertise in DDR/LPDDR/HBM technologies and strong skills in System Verilog. The role involves defining verification testbench architecture and collaborating with cross-functional teams to deliver leading-edge semiconductor solutions.

Skills & Requirements

Must-have

  • 4+ years in chip design verification
  • Proficient in System Verilog and UVM
  • Experience with DDR/LPDDR/HBM technologies

Nice-to-have

  • Strong communication and interpersonal skills
  • Ability to work collaboratively
  • Experience with AMBA protocols

Key Requirements

  • 2+ years working with DDR/LPDDR/HBM
  • Knowledge of AMBA protocols AXI, AHB, APB

Work Rights

Not specified

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