Senior Design Verification Engineer - Neuromorphic Computing

Intel Corporation

Hillsboro, Oregon, US
Base: $164,470.00-311,890.00 usd; bonus/equity: st...
Hybrid
5+ years verification experience in soc accelerators
5+ years uvm/ovm and constrained random verification
2+ years owning entire verification stack including test planning
Intel Corporation is seeking a Senior Design Verification Engineer for its Neuromorphic Computing Lab to develop a verification framework for innovative semiconductor technologies. Ideal candidates should have extensive experience in silicon engineering, particularly in verification methods, and be passionate about advancing AI technology

Job Summary

  • The role involves creating unit-level and system-level test plans while writing directed and random tests for design partitions and chip-level verification.
  • Candidates will debug test failures, track coverage, and work closely with designers to fix issues and improve overall verification metrics.
  • Intel offers a competitive total compensation package including stock bonuses, health benefits, retirement plans, and vacation time.

Matching Summary

Match Score: 85

Intel Corporation is seeking a Senior Design Verification Engineer for its Neuromorphic Computing Lab to develop a verification framework for innovative semiconductor technologies. Ideal candidates should have extensive experience in silicon engineering, particularly in verification methods, and be passionate about advancing AI technology.

Salary

Base: $164,470.00-311,890.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • 5+ years verification experience in SoC accelerators
  • 5+ years UVM/OVM and constrained random verification
  • 2+ years owning entire verification stack including test planning
  • 1+ year experience using AI tools for test generation
  • Bachelors degree with 8+ years or Masters with 6+ years experience

Nice-to-have

  • Experience with neuromorphic computing or AI/ML accelerator design
  • Familiarity with asynchronous design methodologies
  • Experience leading silicon design/verification teams
  • Knowledge of commercial Verification IPs for standard IO interfaces
  • Experience with DFX, low power and UPF verification techniques

Key Requirements

  • 8+ years silicon engineering experience (Bachelor's) or 6+ years (Master's)
  • Minimum 5 years verification experience in SoC accelerators or custom ASICs
  • Minimum 2 years owning the full verification stack
  • Minimum 1 year using AI tools for productivity improvement

Work Rights

Not specified

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