Job Summary

• Create and enhance cutting-edge physical design methodologies for implementing GPUs, CPUs, and SoCs, focusing on optimizing Power, Performance, and Area (PPA) as well as improving the runtime efficiency of the physical design process on advanced technology nodes.
• Develop workflows for advanced place and route techniques, floorplanning, and chip assembly, including power and clock distribution, power and area optimization, timing analysis, IR and EM analysis.
• Continuously strive to improve the RTL-to-GDS flow to enhance Power, Performance, and Area (PPA), address a wide range of design issues, and implement proactive interventions.

Matching Summary

Skills & Requirements

Key Requirements

• MS in Electrical or Computer Engineering (or equivalent experience)
• Minimum 5 years of experience in Physical Design Engineering
• Demonstrated success in enhancing PPA for high-performance and low-power designs
• Strong understanding of physical design optimization and routing methodologies
• Experience with power distribution networks, Design for Yield and Manufacturability, EM and IR closure, and thermal management
• Expertise and in-depth knowledge of industry-standard EDA tools

Work Rights