Asic Engineer - Sdc

Cisco

San Jose, CA, US
Base: $165,000.00 to $241,400.00; bonus/equity: no...
Onsite
Full-chip timing constraints
Static timing analysis expertise
Developing block-level sdc constraints
Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks

Job Summary

  • Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks.
  • Own and develop full-chip timing constraints across functional and test modes for complex networking SoCs.
  • At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era.

Matching Summary

Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks.

Salary

Base: $165,000.00 to $241,400.00; Bonus/Equity: Not specified; Benefits: Medical, dental and vision insurance, 401(k) plan

Skills & Requirements

Must-have

  • Full-chip timing constraints
  • Static Timing Analysis expertise
  • Developing block-level SDC constraints

Nice-to-have

  • Timing-driven design improvements
  • Engineering scripting and automation
  • Complex clocking architectures

Key Requirements

  • Bachelor’s degree in Electrical or Computer Engineering
  • 7+ years of ASIC experience
  • Experience with Synopsys PrimeTime or Cadence Tempus

Work Rights

Not specified

Tailored Resume

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