Distinguished Engineer, Switch Architect

Marvell Technology

Base: $203,900 - $305,500 py; bonus/equity: not sp...
Not specified
Architecting large-scale asics
High-speed interconnects and ethernet protocols
Performance modeling and simulation
Marvell Technology is seeking a Distinguished Engineer in Switch Architecture to drive the design of next-generation AI networking switch ASICs for hyperscale environments. The role requires extensive experience in ASIC architecture and a strong understanding of high-speed interconnects, with an emphasis on collaboration and leadership

Job Summary

  • This role involves defining the architecture for Marvell's next-generation AI networking switch ASICs designed for hyperscale cloud and ML/AI-driven workloads.
  • The successful candidate will collaborate with high-caliber engineering peers to solve some of the largest-scale data networking challenges on earth.
  • Marvell offers comprehensive benefits including an employee stock purchase plan, family support programs, and robust mental health resources.

Matching Summary

Match Score: 85

Marvell Technology is seeking a Distinguished Engineer in Switch Architecture to drive the design of next-generation AI networking switch ASICs for hyperscale environments. The role requires extensive experience in ASIC architecture and a strong understanding of high-speed interconnects, with an emphasis on collaboration and leadership.

Salary

Base: $203,900 - $305,500 per annum; Bonus/Equity: Not specified; Benefits: Employee stock purchase plan, family support, mental health resources

Skills & Requirements

Must-have

  • Architecting large-scale ASICs
  • High-speed interconnects and Ethernet protocols
  • Performance modeling and simulation
  • C/C++ and Python proficiency
  • AI training and inference fabrics

Nice-to-have

  • Contributing to industry standards development
  • Mentoring engineering talent
  • Collaborative leadership style
  • Experience with Ultra Ethernet standards
  • Strategic customer discussion skills

Key Requirements

  • BS with 15+ years experience or MS with 10+ years or PhD with 8+ years
  • Extensive experience defining complex networking semiconductor architectures
  • Eligible to access export-controlled information under US law

Work Rights

Must be eligible to access export-controlled information (US citizens, lawful permanent residents, or protected individuals)

Tailored Resume

Cover Letter