Silicon Packaging Design Engineer

Intel Corporation

Phoenix, Arizona, United States
Base: $105,650.00-149,150.00 usd; bonus/equity: st...
Substrate design rules
Physical layout and routing
Design rule checks (drcs)
Drive the development of advanced substrate designs from concept through tape-out, ensuring optimal performance, cost efficiency, and manufacturability

Job Summary

  • Drive the development of advanced substrate designs from concept through tape-out, ensuring optimal performance, cost efficiency, and manufacturability.
  • Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions, directly impacting Intel's success in delivering world-class solutions.
  • We offer a total compensation package that ranks among the best in the industry, consisting of competitive pay, stock bonuses, and benefit programs.

Matching Summary

Drive the development of advanced substrate designs from concept through tape-out, ensuring optimal performance, cost efficiency, and manufacturability.

Salary

Base: $105,650.00-149,150.00 USD; Bonus/Equity: stock bonuses; Benefits: health, retirement, vacation

Skills & Requirements

Must-have

  • Substrate design rules
  • Physical layout and routing
  • Design Rule Checks (DRCs)
  • Silicon-package-board interactions
  • Microelectronic package physical layout

Nice-to-have

  • Electrical modeling and simulation
  • Scripting with Python, VB, C
  • Creative problem-solving skills

Key Requirements

  • Bachelors with 1+ years or Masters with 6 months experience
  • 6+ months microelectronic package/PCB layout experience
  • Familiarity with package design tools

Work Rights

Not specified

Tailored Resume

Cover Letter