This role serves as a core technical leader responsible for end-to-end defect engineering, from advanced SiC defect reduction and AI-based inspection operations to SPC-driven yield and reliability improvement
Job Summary
This role serves as a core technical leader responsible for end-to-end defect engineering, from advanced SiC defect reduction and AI-based inspection operations to SPC-driven yield and reliability improvement.
Key responsibilities include SiC technology advancement, new defect mode improvement, ADC & Klarity operation, and production/VOG management.
The position requires a minimum of 4 years of experience in Defect Engineering or Defect Management within semiconductor factory or process environments.
Matching Summary
This role serves as a core technical leader responsible for end-to-end defect engineering, from advanced SiC defect reduction and AI-based inspection operations to SPC-driven yield and reliability improvement.