Principal Eda Software Engineer (c++, Characterization)

BETA CAE Systems International AG

San Jose, California, US
$136,500 to $253,500; bonus, equity, + benefits; n...
Eda tools development
Transistor level analysis
Hardcore c++ knowledge
You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis of the most advanced custom digital and mixed-signal circuits built for communication, IOT and AI markets

Job Summary

  • You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis of the most advanced custom digital and mixed-signal circuits built for communication, IOT and AI markets.
  • Your work will be focused on enhancing and expanding the existing tools' architecture to cover timing analysis, creating new frameworks for analysis of effects dominant at n5 and below, and using machine learning technology to bring order of magnitude speed / capacity / usability improvements over existing solutions.
  • Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

Matching Summary

You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis of the most advanced custom digital and mixed-signal circuits built for communication, IOT and AI markets.

Salary

$136,500 to $253,500; Bonus, equity, and benefits; Not specified

Skills & Requirements

Must-have

  • EDA tools development
  • transistor level analysis
  • Hardcore C++ Knowledge
  • Linux Proficiency
  • designing data structures
  • algorithms and software engineering principles

Nice-to-have

  • circuit simulation development
  • library characterization programs
  • SPICE simulation transistor models
  • distributed programming
  • database design
  • cloud APIs for distributed computing
  • machine learning technology

Key Requirements

  • 8+ years of experience
  • Unix or Linux environment experience
  • analyzing transistor or gate level schematics

Work Rights

Not specified

Tailored Resume

Cover Letter