Performance Architect

Cadence

Austin, TX, US
10+ years soc system architecture experience
Deep armv8/armv9 cpu architecture knowledge
Noc fabric and chiplet partitioning expertise
This senior role focuses on defining and optimizing performance across CPUs, interconnects, and memory subsystems for ARM-based SoCs

Job Summary

  • This senior role focuses on defining and optimizing performance across CPUs, interconnects, and memory subsystems for ARM-based SoCs.
  • The candidate will drive architectural trade-offs involving latency, bandwidth, power, and area while working closely with IP and design teams.
  • Responsibilities include building system-level performance models and correlating results with RTL, emulation, or silicon data as designs mature.

Matching Summary

This senior role focuses on defining and optimizing performance across CPUs, interconnects, and memory subsystems for ARM-based SoCs.

Skills & Requirements

Must-have

  • 10+ years SoC system architecture experience
  • Deep ARMv8/ARMv9 CPU architecture knowledge
  • NoC fabric and chiplet partitioning expertise
  • System-level performance modeling techniques
  • Memory hierarchy and bandwidth trade-off analysis

Nice-to-have

  • Experience with UCIe-class die-to-die links
  • Proficiency in synthetic traffic benchmarking
  • Ability to influence early architecture decisions
  • Cross-functional technical leadership skills
  • Familiarity with heterogeneous workload optimization

Key Requirements

  • 10+ years of SoC or system architecture experience
  • Proven background in ARM-based systems
  • Staff-level technical expectations

Work Rights

Not specified

Tailored Resume

Cover Letter