Digital IC Design Engineer (RTL/Verilog/Logic Synthesis/DFT) LT93

TRUST RECRUIT PTE. LTD.

Singapore, Singapore
Verilog/vhdl rtl design experience
Logic synthesis and static timing analysis
Design-for-test (dft) methodologies
The role involves developing and implementing Verilog/VHDL RTL designs based on product specifications

Job Summary

  • The role involves developing and implementing Verilog/VHDL RTL designs based on product specifications.
  • Candidates will lead Design-for-Test activities including scan insertion, ATPG, and pattern validation.
  • The position requires at least 5 years of relevant experience in digital IC design with a proven full cycle track record.

Matching Summary

Match Score: 85

The role involves developing and implementing Verilog/VHDL RTL designs based on product specifications.

Skills & Requirements

Must-have

  • Verilog/VHDL RTL design experience
  • Logic synthesis and static timing analysis
  • Design-for-Test (DFT) methodologies
  • Full IC design cycle from RTL to tape-out
  • Cadence or Synopsys EDA tools proficiency

Nice-to-have

  • FPGA-based verification skills
  • Knowledge of connectivity protocols like USB
  • Mixed-signal IC design background
  • Post-silicon debug capabilities
  • Cross-functional team collaboration

Key Requirements

  • Degree or Master's in Electrical/Electronic Engineering
  • At least 5 years of relevant experience in digital IC design
  • Hands-on experience with full IC design cycle

Work Rights

Not specified

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