Cache Senior Design Engineer For The New Ai Group

Intel

Petah-Tikva, Israel
Hybrid
Block level design
Cache systems design
System verilog
Play a major role in ensuring the quality and functionality of our cutting-edge products for the AI industry

Job Summary

  • Play a major role in ensuring the quality and functionality of our cutting-edge products for the AI industry.
  • Responsible for designing and implementing IP solutions, collaborating with cross-functional teams, and ensuring the quality and performance of IP designs.
  • As a member of the Chief Technology Office, Artificial Intelligence, and Network and Edge Group (CTO AI NEX), you will be committed to strategically penetrating the AI market by delivering disruptive and transformative solutions.

Matching Summary

Play a major role in ensuring the quality and functionality of our cutting-edge products for the AI industry.

Skills & Requirements

Must-have

  • Block Level design
  • Cache systems design
  • System Verilog
  • Backend-RTL skills
  • Timing path analysis

Nice-to-have

  • Communication skills
  • Teamwork
  • Ownership
  • Accountability
  • Problem-solving skills

Key Requirements

  • B.Sc. in Electrical Engineering or Computer Engineering
  • At least 10 years of proven experience in Block Level design
  • At least 3 years of proven experience in Cache systems
  • Backend-RTL relevant skills
  • System Verilog

Work Rights

Not specified

Tailored Resume

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