$142,600 - $206,500 usd; not specified; not specif...
Dft design and verification
Rtl and gate level experience
Eda tools proficiency
This role offers the opportunity to work on cutting-edge technologies including FPGA, processor, DSP, SERDES, IO, 2.5D/3D multi-die packaging, and other advanced solutions
Job Summary
This role offers the opportunity to work on cutting-edge technologies including FPGA, processor, DSP, SERDES, IO, 2.5D/3D multi-die packaging, and other advanced solutions.
You will be responsible for DFT architecture and implementation, contributing to the development of DFT methodologies and flows to improve pre-silicon and post-silicon validation processes.
Ensure manufacturability goals are met, including test coverage, test cost optimization, yield improvement, and debug support.
Matching Summary
This role offers the opportunity to work on cutting-edge technologies including FPGA, processor, DSP, SERDES, IO, 2.5D/3D multi-die packaging, and other advanced solutions.
Salary
$142,600 - $206,500 USD; Not specified; Not specified
Skills & Requirements
Must-have
DFT design and verification
RTL and gate level experience
EDA tools proficiency
Scripting languages (Perl/TCL)
ATPG pattern generation
Pre-silicon validation
Nice-to-have
Test compression and BIST experience
Advanced fault models
2.5D/3D multi-die designs
High-speed IO/SerDes DFT
Key Requirements
Bachelor's degree + 7 years industry experience OR Master's degree + 5 years industry experience
DFT design and verification at RTL and gate level
Experience with synthesis, scan insertion, ATPG, simulation, debug, and STA tools