PD (CPU/GPU/VPU) Engineer

PERSOL SINGAPORE PTE. LTD.

Singapore, Singapore
4+ years physical design experience
Cadence innovus and voltus proficiency
Mentor calibre drc/lvs expertise
The role involves performing floorplanning, placement, and routing for complex ASIC designs to optimize power, performance, and area

Job Summary

  • The role involves performing floorplanning, placement, and routing for complex ASIC designs to optimize power, performance, and area.
  • Candidates must conduct timing analysis and closure while implementing design rule checks and layout versus schematic validations.
  • Proficiency with industry-standard EDA tools like Cadence Innovus, Voltus, and Mentor Calibre is required for success.

Matching Summary

Match Score: 85

The role involves performing floorplanning, placement, and routing for complex ASIC designs to optimize power, performance, and area.

Skills & Requirements

Must-have

  • 4+ years physical design experience
  • Cadence Innovus and Voltus proficiency
  • Mentor Calibre DRC/LVS expertise
  • Advanced process node knowledge (3nm/4nm)
  • Clock tree synthesis optimization

Nice-to-have

  • Strong problem-solving analytical skills
  • Excellent communication teamwork abilities

Key Requirements

  • Bachelor's or Master's Degree in Electrical Engineering
  • 4+ years of experience in physical design
  • Proficiency in Cadence and Mentor EDA tools

Work Rights

Not specified

Tailored Resume

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