Perform functional verification of IP logic to ensure design will meet specification requirements
Job Summary
Perform functional verification of IP logic to ensure design will meet specification requirements.
Develop IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
Collaboration with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
Matching Summary
Perform functional verification of IP logic to ensure design will meet specification requirements.
Skills & Requirements
Must-have
Pre-Si verification experience
Specman "e" / System Verilog
Verification methodologies
Debugging techniques
Collaboration with design teams
Nice-to-have
PCIe Protocol knowledge
Power and timing analysis
Technical review leadership
Key Requirements
6+ years of experience in Pre-Si verification
B.Sc. or M.Sc. in Electrical\Computer Engineering
Experience at block, cluster and FC levels
Experience with architecture, RTL, and physical design teams