Memory Research Scientist

Intel

Tokyo, Japan
Hybrid
15+ years semiconductor industry experience
Native japanese and english fluency
Technical leadership in compute architecture
This role serves as the critical technical connector between Japanese partners, IJKK, and US engineering resources supporting ZAM NEDO program activities

Job Summary

  • This role serves as the critical technical connector between Japanese partners, IJKK, and US engineering resources supporting ZAM NEDO program activities.
  • The successful candidate will lead technical execution of R+D programs from architecture through manufacturing and test while expanding applied research in AI/HPC.
  • Candidates must possess a proven ability to balance strategic initiatives with pragmatic engineering execution within the Japanese government and commercial eco-system.

Matching Summary

This role serves as the critical technical connector between Japanese partners, IJKK, and US engineering resources supporting ZAM NEDO program activities.

Skills & Requirements

Must-have

  • 15+ years semiconductor industry experience
  • Native Japanese and English fluency
  • Technical leadership in compute architecture
  • Memory technology expertise preferred
  • Full development life-cycle management

Nice-to-have

  • Strategic initiative balancing skills
  • Advanced system architecture background
  • Strong Japanese research ecosystem relationships
  • Motivation to look ahead 3-5 years

Key Requirements

  • Minimum BA degree
  • 15+ years experience in Semiconductors industry
  • Native Japanese and English language skills
  • Proven technical coordination between US and Japanese teams
  • Experience in full development life-cycle of multiple semiconductor programs

Work Rights

Not specified

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