Lead Cpu Design Engineer

Intel Retiree Medical Plan Trust

Phoenix, Arizona, United States
Base: $164,470.00-232,190.00 usd; bonus/equity: st...
Hybrid
Cpu logic design
Rtl coding
Power, performance, area, timing goals
As a CPU Logic Design Engineer, you will play a pivotal role in designing and developing the logic architecture for CPUs that serve as the backbone of our cutting-edge technologies

Job Summary

  • As a CPU Logic Design Engineer, you will play a pivotal role in designing and developing the logic architecture for CPUs that serve as the backbone of our cutting-edge technologies.
  • Your contributions will directly impact Intel's ability to deliver high-performance, power-efficient processors that drive the future of computing.
  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Matching Summary

As a CPU Logic Design Engineer, you will play a pivotal role in designing and developing the logic architecture for CPUs that serve as the backbone of our cutting-edge technologies.

Salary

Base: $164,470.00-232,190.00 USD; Bonus/Equity: stock bonuses; Benefits: health, retirement, and vacation

Skills & Requirements

Must-have

  • CPU logic design
  • RTL coding
  • power, performance, area, timing goals
  • microarchitecture fundamentals
  • debugging RTL implementation issues
  • CPU architecture concepts

Nice-to-have

  • strong communication skills
  • work collaboratively cross-functional teams
  • deliver high-quality designs tight deadlines
  • enthusiasm for innovation
  • understanding complex Intel Architecture CPU

Key Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
  • 6+ years of experience with a Bachelor's degree
  • 4+ years with a Master's degree
  • 2+ years with a PhD
  • Logic design and RTL coding techniques
  • Expertise in power and performance analysis and optimization
  • Microarchitecture fundamentals and low-power design methodologies
  • Experience with debugging and resolving RTL implementation issues
  • Strong knowledge of CPU architecture
  • Developing and debugging functional tests in Assembly language

Work Rights

Not specified

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