The role involves collaborating on the development of Low-Density Parity-Check (LDPC) algorithms specifically for Quantum Key Distribution (QKD)
Job Summary
The role involves collaborating on the development of Low-Density Parity-Check (LDPC) algorithms specifically for Quantum Key Distribution (QKD).
Candidates will study resource requirements for implementing these algorithms on Xilinx FPGAs, with potential for actual implementation if time permits.
This internship offers a monthly stipend of 500.00€ gross for a 5-hour daily morning schedule at the Torres Quevedo center in Tres Cantos, Madrid.
Matching Summary
The role involves collaborating on the development of Low-Density Parity-Check (LDPC) algorithms specifically for Quantum Key Distribution (QKD).
Salary
Stipend: 500.00€ gross monthly; Hours: 5h daily; Benefits: Not specified
Skills & Requirements
Must-have
VHDL programming experience
FPGA design skills
Xilinx FPGA knowledge
Nice-to-have
Hardware architecture understanding
Electronics design background
Strong mathematical proficiency
Physics knowledge
English B2 level
Key Requirements
Current student in Engineering or Physics degree/master