Semi-Conductor Senior Design Verification Engineer

REALTEK SINGAPORE PRIVATE LIMITED

Singapore, Singapore
Systemverilog and uvm experience
Asic verification methodology knowledge
Digital design spec understanding
The role involves developing detailed module-level and SoC-level test plans based on digital design specifications

Job Summary

  • The role involves developing detailed module-level and SoC-level test plans based on digital design specifications.
  • Candidates will build comprehensive ASIC verification environments including stimulus, checkers, assertions, monitors, and scoreboards.
  • The position requires collaborating with the digital design team to debug functional test cases and ensure functionally correct designs.

Matching Summary

Match Score: 85

The role involves developing detailed module-level and SoC-level test plans based on digital design specifications.

Skills & Requirements

Must-have

  • SystemVerilog and UVM experience
  • ASIC verification methodology knowledge
  • Digital design spec understanding
  • Functional test development skills
  • EDA tools simulation experience

Nice-to-have

  • Ethernet L2/L3 switch or router knowledge
  • AMBA bus protocol familiarity
  • High-speed IO interface experience
  • Strong communication and documentation skills
  • Ability to work in dynamic environments

Key Requirements

  • BSEE or MSEE degree required
  • Entry level experience acceptable
  • Strong hardware functional verification language skills

Work Rights

Not specified

Tailored Resume

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