Experienced Logic Design Engineer

Inteelabs

Petah-Tikva, Israel
System verilog or verilog experience
Chip design minimum 7 years
Full development cycles from architecture to tape-out
Join a growing team developing state-of-the-art IPU and NIC products for data center networking

Job Summary

  • Join a growing team developing state-of-the-art IPU and NIC products for data center networking.
  • Lead full development cycles of design units from architecture to tape-out in collaboration with cross-functional teams.
  • Work with the latest silicon technologies and processes to build advanced large-scale networking complex designs.

Matching Summary

Join a growing team developing state-of-the-art IPU and NIC products for data center networking.

Skills & Requirements

Must-have

  • System Verilog or Verilog experience
  • Chip design minimum 7 years
  • Full development cycles from architecture to tape-out
  • Collaboration with multiple engineering teams

Nice-to-have

  • Networking designs experience
  • Perl/Python scripting skills
  • Basic synthesis tools knowledge

Key Requirements

  • BSc. in Electrical Engineering or Computer Engineering
  • Minimum 7 years of experience in chip design
  • Experience with System Verilog or Verilog
  • Excellent problem-solving ability
  • Good communication skills, Team player, High work motivation

Work Rights

Not specified

Tailored Resume

Cover Letter