Principal Engineer - Fpga/asic Design

Rolls-Royce

Indianapolis, IN, US
$113,179 - $183,916-annually py
On-site
Fpga/asic design and verification
Rtl coding (vhdl, verilog, systemverilog)
Timing closure on fpga designs
Design, verify, integrate, and test FPGA/ASIC solutions for current and future engine control system products

Job Summary

  • Design, verify, integrate, and test FPGA/ASIC solutions for current and future engine control system products.
  • Participate in all project phases, producing detailed design documentation, verification plans, and reports for certification authorities.
  • Rolls-Royce is recognized as a top employer for engineers, offering excellent development opportunities, competitive salary, and exceptional benefits.

Matching Summary

Design, verify, integrate, and test FPGA/ASIC solutions for current and future engine control system products.

Salary

$113,179 - $183,916-Annually

Skills & Requirements

Must-have

  • FPGA/ASIC design and verification
  • RTL coding (VHDL, Verilog, SystemVerilog)
  • Timing closure on FPGA designs
  • Test bench creation
  • DO-254 verification

Nice-to-have

  • Lab validation with test equipment
  • Scripting (TCL, Python, Shell)
  • Version control (Git, SVN)
  • Model-based systems development
  • SysML modelling

Key Requirements

  • Bachelor's degree in Electronics/Computer Engineering with 5+ years experience
  • Master's degree in Electronics/Computer Engineering with 3+ years experience
  • PhD in Electronics/Computer Engineering
  • U.S. Citizen

Work Rights

Must have US citizenship

Tailored Resume

Cover Letter