Director, Asic Design-for-test

Acacia, part of Cisco

United States
Base: $230,100.00 - $325,300.00; bonus/equity: ann...
Fully remote
Asic dft methodologies
Jtag, boundary scan, edt scan atpg
Mbist/mbisr tools and scripting
Lead a team of Design-For-Test engineers in the development of cutting-edge ASICs for multi-100G to 1.6T coherent optical communications products

Job Summary

  • Lead a team of Design-For-Test engineers in the development of cutting-edge ASICs for multi-100G to 1.6T coherent optical communications products.
  • Allocate team resources, prioritize deliverables, and provide in-depth technical leadership on DFT processes and methods.
  • Recruit additional DFT staff engineers, manage contract resources, monitor team performance, and conduct annual reviews.

Matching Summary

Lead a team of Design-For-Test engineers in the development of cutting-edge ASICs for multi-100G to 1.6T coherent optical communications products.

Salary

Base: $230,100.00 - $325,300.00; Bonus/Equity: Annual bonuses, restricted stock units; Benefits: Medical, dental, vision, 401(k), paid time off

Skills & Requirements

Must-have

  • ASIC DFT methodologies
  • JTAG, boundary scan, EDT scan ATPG
  • MBIST/MBISR tools and scripting
  • Test pattern development
  • Post-silicon ATE debug

Nice-to-have

  • Collaborate across global teams
  • Self-motivated and organized
  • Strong team player

Key Requirements

  • 15+ years industry experience
  • 5+ years managing direct reports
  • Bachelor's or Master's degree in CS, CE, EE
  • Remote from anywhere in the United States

Work Rights

Not specified

Tailored Resume

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