Dv - Staff Verification Engineer - Serdes

Eliyan

Bay Area, US
On-site
Serdes verification leadership
State-of-the-art testbenches
Uvm/sv testbenches
Join the leading chiplet startup creating technologies for tomorrow's chiplet-based systems

Job Summary

  • Join the leading chiplet startup creating technologies for tomorrow's chiplet-based systems.
  • Lead the verification of Serdes, developing state-of-the-art testbenches and unit/chip level test cases for best-in-class PHYs.
  • This is a hands-on technical leadership role where you will own verification of TX/RX equalization and CDR, define PHY verification architecture, and ensure designs are bug-free.

Matching Summary

Join the leading chiplet startup creating technologies for tomorrow's chiplet-based systems.

Skills & Requirements

Must-have

  • Serdes verification leadership
  • State-of-the-art testbenches
  • UVM/SV testbenches
  • PHY verification architecture definition
  • Hands-on technical leadership

Nice-to-have

  • Fast-paced startup environment
  • Cross-functional team collaboration
  • Fun work environment

Key Requirements

  • Staff Verification Engineer experience
  • Serdes verification expertise
  • UVM/SystemVerilog experience

Work Rights

Not specified

Tailored Resume

Cover Letter