We utilize latest process technology, advanced EDA tools, and sophisticated design methodology
Job Summary
We utilize latest process technology, advanced EDA tools, and sophisticated design methodology.
You will participate in various aspects of physical design for NVIDIA GPU and Mobile chips, including full chip floorplanning, power/clock distribution, timing optimization, place & route, timing closure, power/signal integrity analysis, and physical verification.
Collaboration with RTL, DFT and Circuit designers ensures high quality of design implementation.
Matching Summary
We utilize latest process technology, advanced EDA tools, and sophisticated design methodology.
Skills & Requirements
Must-have
Power user of Synopsys EDA tools
Experience in clock and power distribution
Timing closure expertise
Place and route skills
Experience with advanced technology nodes
Troubleshooting design and flow issues
Nice-to-have
Knowledge of FinFET technology
Experience with physical verification tools
Proficiency in Perl, Python, TCL scripting
Collaboration with RTL, DFT and Circuit designers
Key Requirements
BS in Engineering or Science or equivalent experience
2+ years experience in physical design
Experience with Synopsys, Cadence or Ansys EDA tools