Senior Soc Logic Design Engineer

Intel

Bangalore, India
Hybrid
Rtl coding and simulation
Ip block integration
Power, performance, area, timing goals
Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design

Job Summary

  • Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design.
  • Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence.
  • Works with IP providers to integrate and validate IPs at the SoC level.

Matching Summary

Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design.

Skills & Requirements

Must-have

  • RTL coding and simulation
  • IP block integration
  • Power, performance, area, timing goals
  • Secure development practices
  • X86 Server Micro Architecture
  • DFX - Scan, JTAG, VISA

Nice-to-have

  • Influence in matrixed environment
  • Operate in ambiguity
  • Pull teams together
  • Excellent communication and documentation

Key Requirements

  • BSEE/CE minimum, MS preferred
  • 8 plus years' experience in IC/SoC Design
  • Experience in logic development lifecycle
  • Reset and Clocking expertise
  • Power Management expertise
  • DFX - Scan, JTAG, VISA, Integration etc.
  • Design for Debug (DFD) experience

Work Rights

Not specified

Tailored Resume

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