Design Engineer I

Cadence

San Jose, California, USA
Base: $88,900 to $165,100; bonus/equity: incentive...
On-site
Dsp algorithm design
High-speed serdes
End-to-end system modeling
DSP algorithm design for high-speed serdes

Job Summary

  • DSP algorithm design for high-speed serdes.
  • Simulation and reporting of anticipated performance of HSS designs under development.
  • Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

Matching Summary

DSP algorithm design for high-speed serdes.

Salary

Base: $88,900 to $165,100; Bonus/Equity: Incentive compensation (bonus, equity); Benefits: Paid vacation, paid holidays, 401(k) plan with employer match, employee stock purchase plan, medical, dental, and vision plans

Skills & Requirements

Must-have

  • DSP algorithm design
  • High-speed serdes
  • End-to-end system modeling
  • Analog and digital hardware modeling
  • Simulation and performance reporting
  • Model verification with lab measurements

Nice-to-have

  • Innovation and leadership
  • Solving complex challenges

Key Requirements

  • Design Engineer I role

Work Rights

Not specified

Tailored Resume

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