Staff Digital Verification Engineer

Alphawave Semi

Toronto, Canada
Asic design verification
Verilog/systemverilog coding
Uvm and verification techniques
Own the end-to-end verification of new features and optimizations

Job Summary

  • Own the end-to-end verification of new features and optimizations.
  • Build releases of our design IP for customers and support post-silicon validation activities.
  • We have a flexible work environment to support and help employees thrive in personal and professional capacities.

Matching Summary

Own the end-to-end verification of new features and optimizations.

Skills & Requirements

Must-have

  • ASIC design verification
  • Verilog/SystemVerilog coding
  • UVM and verification techniques
  • constrained-random verification
  • Python, Perl, C/C++
  • Linux/Unix environment

Nice-to-have

  • leading, planning, and coordinating tasks
  • flexible work environment
  • continuous improvement of methodologies

Key Requirements

  • Bachelor or Master degree in Computer or Electrical Engineering
  • Experience with delivering to multiple programs
  • Strong initiative and independently capable

Work Rights

Not specified

Tailored Resume

Cover Letter