Principal Logic Design Engineer

Altera Corporation

New Delhi, India
Fully remote
System verilog
Vcs/synopsys simulators
Lint and synthesis
Altera, a leader in programmable solutions from cloud to edge, delivers cutting-edge FPGA, CPLD, and IP technologies

Job Summary

  • Altera, a leader in programmable solutions from cloud to edge, delivers cutting-edge FPGA, CPLD, and IP technologies.
  • We are seeking a talented Logic Design Engineer to develop and optimize mixed-signal and high-speed IPs for integration into full-chip designs.
  • Our mission is to empower engineers to design and deploy advanced systems with unmatched flexibility and performance.

Matching Summary

Altera, a leader in programmable solutions from cloud to edge, delivers cutting-edge FPGA, CPLD, and IP technologies.

Skills & Requirements

Must-have

  • System Verilog
  • VCS/Synopsys simulators
  • Lint and Synthesis
  • RTL coding and simulation
  • mixed-signal and high-speed IPs

Nice-to-have

  • good communication and problem-solving skills
  • work with different teams
  • FPGA design and programming
  • RTL validation

Key Requirements

  • 15+ years' experience with bachelor's or master's degree
  • Experience in C/C++/Perl/Python/TCL/Unix Shell script
  • Electrical engineering, Computer Engineering, or related field

Work Rights

Not specified

Tailored Resume

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