Drive the design and delivery of high-speed interface IPs, with a strong emphasis on Die-to-Die (D2D) interconnects based on the UCIe standard and advanced package technologies
Job Summary
Drive the design and delivery of high-speed interface IPs, with a strong emphasis on Die-to-Die (D2D) interconnects based on the UCIe standard and advanced package technologies.
Own analog blocks for high-speed interfaces such as clocking, TX/RX front-ends, termination schemes, biasing, and equalization support circuits.
Collaborate with AMS verification, digital, and system teams to enable full-chip integration and validation.
Matching Summary
Drive the design and delivery of high-speed interface IPs, with a strong emphasis on Die-to-Die (D2D) interconnects based on the UCIe standard and advanced package technologies.
Skills & Requirements
Must-have
High-speed interface design
UCIe standard concepts
Analog circuit theory fundamentals
Schematic design and simulation
Advanced packaging technologies
Nice-to-have
Post-silicon debug and correlation
Power integrity and thermal considerations
Mentor junior engineers
Package-aware design flows
Key Requirements
8+ years analog/mixed-signal IC design experience
Bachelor’s or Master’s degree in Electrical / Electronics Engineering
Strong experience with high-speed interface design