Physical Design Engineer - Foundry Team

Samsung Electronics

Bangalore, India
5+ years of physical design experience
Complex soc top physical implementation
Timing closure and ppa optimization
The role involves complex SOC top physical implementation for next-generation mobile application processors and modem subsystems

Job Summary

  • The role involves complex SOC top physical implementation for next-generation mobile application processors and modem subsystems.
  • Engineers are expected to possess strong understanding of timing, power, and area trade-offs while optimizing PPA metrics.
  • Candidates must have experience with large SOC designs exceeding 20 million gates operating at frequencies over 1GHz.

Matching Summary

The role involves complex SOC top physical implementation for next-generation mobile application processors and modem subsystems.

Skills & Requirements

Must-have

  • 5+ years of physical design experience
  • Complex SOC top physical implementation
  • Timing closure and PPA optimization
  • Deep sub-micron design familiarity
  • Industry standard tool proficiency

Nice-to-have

  • Top level floor planning expertise
  • Recent successful SOC tape-outs
  • Hierarchical and top-down design knowledge
  • Scripting languages Perl/Tcl
  • Mixed signal block integration

Key Requirements

  • B.Tech/B.E/M.Tech/M.E degree
  • Minimum 5 years of relevant experience
  • Experience with 8nm/5nm process nodes

Work Rights

Not specified

Tailored Resume

Cover Letter