NXP Semiconductors seeks an experienced Senior Static Timing Analysis Engineer to join their IC design team, focusing on timing signoff for complex SoC projects. The ideal candidate will possess strong technical expertise in STA methodologies and tools while demonstrating effective collaboration skills within a global team environment
Job Summary
The Senior STA Engineer will lead timing signoff activities for complex SoC projects.
This role involves collaboration with front-end and back-end design teams to ensure high-quality chip implementation.
The engineer will also mentor junior engineers on STA fundamentals and debugging techniques.
Matching Summary
Match Score: 85
NXP Semiconductors seeks an experienced Senior Static Timing Analysis Engineer to join their IC design team, focusing on timing signoff for complex SoC projects. The ideal candidate will possess strong technical expertise in STA methodologies and tools while demonstrating effective collaboration skills within a global team environment.