Non-volatile Memory Ip Design Manager

NXP Semiconductors

Bangalore, India
Nvm analog design
Digital design and verification
Dft and validation
The CTO/Frontend Innovation/NVM Design Department is responsible for all embedded Non-Volatile Memory deployment across NXP business and product lines

Job Summary

  • The CTO/Frontend Innovation/NVM Design Department is responsible for all embedded Non-Volatile Memory deployment across NXP business and product lines.
  • You will be responsible for building a team of 10 to 20 engineers who will specialize in NVM Analog Design, Digital Design and Verification, DFT and validation.
  • You will nurture a high-performance culture within your team by employing NXP’s performance management process.

Matching Summary

The CTO/Frontend Innovation/NVM Design Department is responsible for all embedded Non-Volatile Memory deployment across NXP business and product lines.

Skills & Requirements

Must-have

  • NVM Analog Design
  • Digital Design and Verification
  • DFT and validation
  • Logic NVM, Flash, Disruptive Memory Solutions
  • NVM design flow and quality standards

Nice-to-have

  • Agent of change
  • High-performance culture
  • Collaborative innovation projects
  • International relationships

Key Requirements

  • 12+ years of design experience
  • Significant experience leading an engineering team
  • BE or MS in Electrical/Electronics Engineering
  • Experience in developing and launching high volume mixed signal products into production including the automotive market

Work Rights

Not specified

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