The Senior IP Design Engineer will be responsible for designing and implementing IP solutions, collaborating with cross-functional teams, and ensuring the quality and performance of IP designs
Job Summary
The Senior IP Design Engineer will be responsible for designing and implementing IP solutions, collaborating with cross-functional teams, and ensuring the quality and performance of IP designs.
As a member of the Chief Technology Office, Artificial Intelligence, and Network and Edge Group (CTO AI NEX), you will be committed to strategically penetrating the AI market by delivering disruptive and transformative solutions.
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
Matching Summary
The Senior IP Design Engineer will be responsible for designing and implementing IP solutions, collaborating with cross-functional teams, and ensuring the quality and performance of IP designs.
Skills & Requirements
Must-have
Block Level design experience
Cache systems experience
System Verilog
Backend-RTL skills
solving timing paths
area reduction
Nice-to-have
communication
teamwork
Ownership
accountability
analytical skills
problem-solving skills
Key Requirements
B.Sc. in Electrical Engineering or Computer Engineering
At least 10 years of proven experience in Block Level design
At least 3 years of proven experience in Cache systems