Asic Design Engineer - Cisco Silicon One

Cisco UK

Tel Aviv, Israel
Rtl design verilog systemverilog
Micro-architecture specifications
Timing performance power requirements
Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development, covering the full spectrum of chip design

Job Summary

  • Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development, covering the full spectrum of chip design.
  • Leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what’s possible.
  • Cisco Silicon One™ is transforming the industry with a unified, programmable architecture powering Cisco’s future routing portfolio and shaping the Internet for decades to come.

Matching Summary

Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development, covering the full spectrum of chip design.

Skills & Requirements

Must-have

  • RTL design Verilog SystemVerilog
  • micro-architecture specifications
  • timing performance power requirements
  • full chip integration
  • verification engineers collaboration
  • physical design team collaboration

Nice-to-have

  • MATLAB simulations bit-exact modeling
  • mixed-signal systems environments
  • Clock Domain Crossing knowledge

Key Requirements

  • B.Sc./M.Sc. Electrical Engineering
  • 3+ years relevant experience
  • RTL design experience
  • UVM functional verification familiarity

Work Rights

Not specified

Tailored Resume

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