Asic Design Verification Engineer

Cisco

Bangalore, India
Asic verification using uvm/system verilog
Building test benches from scratch
Verifying sophisticated blocks and clusters
You will engage in dynamic collaboration with verification engineers, designers, and multi-functional teams

Job Summary

  • You will engage in dynamic collaboration with verification engineers, designers, and multi-functional teams.
  • You will contribute to developing Cisco’s progressive data center by crafting industry-leading sophisticated chips.
  • We are Cisco, and our power starts with you.

Matching Summary

You will engage in dynamic collaboration with verification engineers, designers, and multi-functional teams.

Skills & Requirements

Must-have

  • ASIC verification using UVM/System Verilog
  • Building test benches from scratch
  • Verifying sophisticated blocks and clusters

Nice-to-have

  • Scripting experience with Perl and Python
  • Experience with data path verification
  • Formal verification knowledge

Key Requirements

  • Bachelor’s Degree in EE, CE, or related field
  • 7+ years of ASIC design verification experience
  • Hands-on experience with System Verilog constraints

Work Rights

Not specified

Tailored Resume

Cover Letter