Principal Design Verification Engineer

onsemi

Bengaluru, Karnataka, India
**
13 years digital verification experience
Systemverilog uvm environment development
Constrained random driven verification
** onsemi is seeking a Principal Design Verification Engineer in Bengaluru, Karnataka. The role involves leading verification strategies for MCU and DSP systems, with an emphasis on creating a collaborative and innovative work environment. **

Job Summary

  • The role involves defining verification strategies and leading projects for embedded MCU, DSP systems, and hardware accelerators.
  • Candidates will develop SystemVerilog/UVM environments and debug functional errors in RTL designs for top-level SoCs.
  • The company offers a diverse, inclusive environment with opportunities for continual learning and international project participation.

Matching Summary

Match Score: 75

** onsemi is seeking a Principal Design Verification Engineer in Bengaluru, Karnataka. The role involves leading verification strategies for MCU and DSP systems, with an emphasis on creating a collaborative and innovative work environment. **

Skills & Requirements

Must-have

  • 13 years digital verification experience
  • SystemVerilog UVM environment development
  • Constrained random driven verification
  • Assertion-based verification expertise
  • Formal verification knowledge

Nice-to-have

  • Python automation programming skills
  • C/C++ embedded software experience
  • CPU/MCU subsystem verification background
  • Team coaching and mentoring abilities
  • International project participation

Key Requirements

  • Minimum BS/MS in Electrical Engineering
  • At least 13 years of digital verification experience
  • Excellent written and verbal English communication

Work Rights

Not specified

Tailored Resume

Cover Letter