Senior Verification Engineer

Altera Corporation

Jerusalem, Israel
Not specified (potentially hybrid based on location)
Systemverilog/uvm verification experience
Python scripting for automation
Digital design and computer architecture knowledge
Altera Corporation is seeking a Senior Verification Engineer to join their Design Verification team in Israel, focusing on high-speed SerDes IP verification. The ideal candidate will have strong hands-on experience with SystemVerilog/UVM, Python scripting, and a solid understanding of digital design and computer architecture

Job Summary

  • The team develops and verifies high-speed SerDes IP technology that moves data at speeds from 10Gbps to 100Gbps+.
  • Engineers will own constrained-random and coverage-driven verification tasks while leveraging AI-assisted tools daily.
  • The role offers exposure to cutting-edge silicon, a collaborative environment, and a real growth path with impact.

Matching Summary

Match Score: 85

Altera Corporation is seeking a Senior Verification Engineer to join their Design Verification team in Israel, focusing on high-speed SerDes IP verification. The ideal candidate will have strong hands-on experience with SystemVerilog/UVM, Python scripting, and a solid understanding of digital design and computer architecture.

Skills & Requirements

Must-have

  • SystemVerilog/UVM verification experience
  • Python scripting for automation
  • Digital design and computer architecture knowledge

Nice-to-have

  • Mixed-signal or analog IP verification
  • Formal verification tools familiarity
  • AI-assisted engineering tools usage

Key Requirements

  • Bachelor's or Master's degree in Engineering or CS
  • 4-7 years of hardware design verification experience
  • Proven ability to take verification tasks from plan to closure

Work Rights

Not specified

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