Junior Physical Design Engineer

Cisco UK

Clock tree synthesis cts expertise
Transistor-level spice simulation experience
Eda tools cadence innovus primetime virtuoso
The team is dedicated to redefining silicon technology by managing full chip physical implementation from RTL to GDSII

Job Summary

  • The team is dedicated to redefining silicon technology by managing full chip physical implementation from RTL to GDSII.
  • Engineers will drive innovation by executing precise Clock Tree Synthesis and optimizing clock distribution across advanced designs.
  • Cisco offers a collaborative environment where highly skilled engineers shape the future of connectivity through cutting-edge solutions.

Matching Summary

The team is dedicated to redefining silicon technology by managing full chip physical implementation from RTL to GDSII.

Skills & Requirements

Must-have

  • Clock Tree Synthesis CTS expertise
  • Transistor-level SPICE simulation experience
  • EDA tools Cadence Innovus PrimeTime Virtuoso
  • Scripting with TCL Python Shell

Nice-to-have

  • Low-power design techniques knowledge
  • Advanced technology node experience 7nm 5nm
  • EM IR analysis and power grid understanding
  • Process variation Monte Carlo simulation exposure

Key Requirements

  • Bachelor's or Master's degree in Electrical Engineering or Computer Science
  • Minimum 2 years hands-on experience in VLSI Physical Design
  • Demonstrated expertise in Clock Tree Synthesis concepts

Work Rights

Not specified

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