Physical verification for technology & reliability rules
NXP USA Inc. is seeking a 2026 Campus - Soc Backend Design Engineer for their Tianjin, China location. The role focuses on the physical implementation of IC designs, requiring expertise in RTL synthesis, GDS implementation, and problem-solving in physical design
Job Summary
The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design.
The individual is responsible from RTL synthesis to GDS implementation and optimization of design including floor planning, routing, timing convergence (STA) including related design ECO and physical verification for fulfilling all Technology & reliability related rules, such as DRC/LVS/Electromigration/IR drops.
The individual contributes to problem solving related to physical design.
Matching Summary
Match Score: 85
NXP USA Inc. is seeking a 2026 Campus - Soc Backend Design Engineer for their Tianjin, China location. The role focuses on the physical implementation of IC designs, requiring expertise in RTL synthesis, GDS implementation, and problem-solving in physical design.
Skills & Requirements
Must-have
RTL synthesis to GDS implementation
floor planning, routing, timing convergence
physical verification for Technology & reliability rules
problem solving related to physical design
define Physical design strategy per technology node
Script coding ability Perl/TCL/Python
Linux/Unix environment
Nice-to-have
Excellent communication skills
collaboration spirit
Key Requirements
Master degree in microelectronics, electronic engineering, computer science or relevant disciplines