Finfet and leading-edge process technology expertise
Cadence virtuoso and synopsys tool proficiency
6+ years custom layout design experience
This role serves as a technical anchor across global sites including India and Mexico to ensure seamless project hand-offs and design consistency
Job Summary
This role serves as a technical anchor across global sites including India and Mexico to ensure seamless project hand-offs and design consistency.
Candidates will architect complex analog and mixed-signal layouts for IO IPs while driving CAD automation to achieve aggressive Power, Performance, and Area targets.
The position requires deep expertise in FinFET technologies and mastery of industry-standard EDA tools like Cadence Virtuoso and Mentor Calibre.
Matching Summary
This role serves as a technical anchor across global sites including India and Mexico to ensure seamless project hand-offs and design consistency.
Skills & Requirements
Must-have
FinFET and leading-edge process technology expertise
Cadence Virtuoso and Synopsys tool proficiency
6+ years custom layout design experience
Advanced English language level required
Unrestricted permanent right to work in Mexico
Nice-to-have
Post Graduate degree in Electrical Engineering
Scripting automation skills in Python or SKILL
Experience with ICC, Fusion compilers, and ICWBEV+
Mentorship and peer review capabilities
Cross-functional collaboration with Technology Development teams
Key Requirements
Bachelor's degree in Electrical or Computer Engineering
Minimum 6 years of device-level CMOS analog layout experience
Must have unrestricted permanent right to work in Mexico without visa sponsorship
Work Rights
Must have unrestricted, permanent right to work in Mexico