Design Validation Test - Lead/principal Engineer

Cerebras Systems

Sunnyvale, CA, United States
**
Design validation test (dvt) ownership
Power delivery validation
High-speed i/o validation
** Cerebras Systems is seeking a hands-on Design Validation Test (DVT) Technical Lead to manage the DVT process for complex electrical engineering systems. The ideal candidate will have extensive experience in hardware validation, particularly in power delivery and high-speed I/O, and will contribute to improving test automation and data management. **

Job Summary

  • Own and drive the Design Validation Test (DVT) process end-to-end across complex electrical engineering boards and full systems.
  • Define validation strategy, build test plans and infrastructure, lead deep debug and root-cause analysis (RCA), and drive closure through design changes and re-test.
  • The domain includes difficult power delivery technology, fast high-speed I/O, and electro-mechanical systems with thermal, optics, and high-power constraints.

Matching Summary

Match Score: 75

** Cerebras Systems is seeking a hands-on Design Validation Test (DVT) Technical Lead to manage the DVT process for complex electrical engineering systems. The ideal candidate will have extensive experience in hardware validation, particularly in power delivery and high-speed I/O, and will contribute to improving test automation and data management. **

Skills & Requirements

Must-have

  • Design Validation Test (DVT) ownership
  • Power delivery validation
  • High-speed I/O validation
  • System integration validation
  • Root-cause analysis (RCA)
  • Test plan creation and execution

Nice-to-have

  • Experience with rack-scale systems
  • Experience with liquid-cooled systems
  • Python for test automation
  • Mentoring experience

Key Requirements

  • 8–15+ years of hardware validation/DVT experience
  • BS/MS in Electrical or Computer Engineering
  • Proficiency with lab equipment
  • Strong background in power delivery validation
  • Strong background in high-speed I/O validation

Work Rights

Not specified

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