Memory Electrical Validation Engineer

Intel Retiree Medical Plan Trust

Bangalore, India
Memory subsystem validation
Electrical validation strategy
Signal integrity compliance
Enable, validate, and debug the Memory subsystem within Intel's mobile, desktop and IOT CPU products

Job Summary

  • Enable, validate, and debug the Memory subsystem within Intel's mobile, desktop and IOT CPU products.
  • Define electrical validation strategy for memory IO interfaces to achieve optimized electrical performance and meet product production goals.
  • Analyze internal and external customer returns with emphasis on improving yields and driving test escape closure.

Matching Summary

Enable, validate, and debug the Memory subsystem within Intel's mobile, desktop and IOT CPU products.

Skills & Requirements

Must-have

  • Memory subsystem validation
  • Electrical validation strategy
  • Signal integrity compliance
  • MRC requirements and optimization
  • Mixed signal architectures
  • System margin validation

Nice-to-have

  • Intel collateral and tools
  • Independent component evaluation
  • Multidisciplinary research participation

Key Requirements

  • EE (Electrical Engineering or Computer Science) BS or MS degree
  • 6-12 years of hands-on experience
  • Memory Electrical/Analog Validation experience
  • Signal integrity and signal margining validation experience
  • Memory Firmware experience
  • Mixed signal IP electrical validation experience
  • Proficiency in DDR5/ LPDDR5

Work Rights

Not specified

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