Lead Hardware Engineer - Dft Ip R&d

Cadence Design Systems

Noida, India
Rtl design using verilog and systemverilog
Dft architecture and methodologies
Systemverilog assertions and checkers
You will be part of a team responsible for creating the innovative technologies required for technology leadership in the DFT space

Job Summary

  • You will be part of a team responsible for creating the innovative technologies required for technology leadership in the DFT space.
  • Development responsibilities include designing, developing, troubleshooting, debugging and supporting the MODUS software product.
  • There is a significant research element to the work that Cadence does that is truly innovative; we don’t know what the answers are when we start out!

Matching Summary

You will be part of a team responsible for creating the innovative technologies required for technology leadership in the DFT space.

Skills & Requirements

Must-have

  • RTL design using Verilog and SystemVerilog
  • DFT architecture and methodologies
  • SystemVerilog assertions and checkers
  • Logic circuits and data structures
  • Front-end EDA tools

Nice-to-have

  • Scripting languages like Perl or Python
  • EDA tool development concepts
  • Innovative problem-solving
  • Research and development focus

Key Requirements

  • 4-6 Years of experience
  • M.Tech, M.E, B.Tech, B.E. in EE/ECE/CS or Equivalent
  • Good understanding of Digital Electronics

Work Rights

Not specified

Tailored Resume

Cover Letter