Senior Principal Dft Engineer

NXP

Pune, India
12+ years dft experience
Mentor/synopsys test generation tools
Dft lead for complex soc to and production
The candidate will serve as the DFT lead for the Pune MCU team, responsible for architecting DFT designs and overseeing instrument insertion

Job Summary

  • The candidate will serve as the DFT lead for the Pune MCU team, responsible for architecting DFT designs and overseeing instrument insertion.
  • This role requires deep collaboration with SOC leads, IP designers, and verification teams to deliver robust DFT implementations and ensure coverage.
  • The successful applicant must possess extensive hands-on experience with Mentor/Synopsys tools and a strong background in complex SOC test operations.

Matching Summary

The candidate will serve as the DFT lead for the Pune MCU team, responsible for architecting DFT designs and overseeing instrument insertion.

Skills & Requirements

Must-have

  • 12+ years DFT experience
  • Mentor/Synopsys test generation tools
  • DFT lead for complex SOC TO and Production
  • JTAG, ATPG, scan compression, MBIST expertise
  • Yield learning and logic diagnosis knowledge

Nice-to-have

  • Synthesis and STA flow experience
  • Tessent shell flow familiarity
  • Lab and test floor bring-up debug skills
  • Yield estimation and test optimization
  • DFT AI mindset application

Key Requirements

  • BE/MS degree in Electronics/Electrical/Computer Engineering
  • Minimum 12+ years of DFT experience
  • Proven track record as a DFT lead for production SOCs

Work Rights

Not specified

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