Director Of Engineering – Asic Design

NXP

15+ years asic front-end design experience
Proven delivery of complex socs in production
Expertise in verilog/systemverilog microarchitecture
This role requires leading the front-end design of advanced SoCs optimized for AI inference, networking, and edge compute workloads

Job Summary

  • This role requires leading the front-end design of advanced SoCs optimized for AI inference, networking, and edge compute workloads.
  • The successful candidate will drive silicon development from concept through RTL, verification, physical design collaboration, and silicon bring-up.
  • Key responsibilities include defining hardware architectures, overseeing RTL integration, and ensuring first-silicon success through cross-functional leadership.

Matching Summary

This role requires leading the front-end design of advanced SoCs optimized for AI inference, networking, and edge compute workloads.

Skills & Requirements

Must-have

  • 15+ years ASIC front-end design experience
  • Proven delivery of complex SoCs in production
  • Expertise in Verilog/SystemVerilog microarchitecture
  • Strong background in RTL integration and verification
  • Experience with low-power design techniques

Nice-to-have

  • Leadership of high-performing global teams
  • Fostering culture of engineering excellence
  • Collaboration with system and software teams
  • Ability to influence across organizations
  • Mentoring and technical career growth focus

Key Requirements

  • 15+ years of experience in ASIC front-end design
  • Proven delivery of complex SoCs or AI accelerators
  • Strong background in architecture, RTL, verification, and timing
  • Experience with Lint, CDC/RDC, STA, and power analysis flows

Work Rights

Not specified

Tailored Resume

Cover Letter