Base: $87,188 to $119,906; bonus/equity: discretio...
On-site
Systemverilog and uvm methodology
Rtl simulation and waveform debug
Digital design fundamentals
Analog Devices is seeking an Engineer for Design Verification Engineering in Massachusetts, focusing on the development and verification of security solutions for integrated circuits. The role requires expertise in SystemVerilog and UVM methodologies, along with a solid foundation in digital design
Job Summary
Analog Devices is expanding its team that architects, designs, and verifies Foundational Security Solutions.
Develop and execute design verification plans, create verification environments, and write/debug tests.
This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time.
Matching Summary
Match Score: 85
Analog Devices is seeking an Engineer for Design Verification Engineering in Massachusetts, focusing on the development and verification of security solutions for integrated circuits. The role requires expertise in SystemVerilog and UVM methodologies, along with a solid foundation in digital design.
Salary
Base: $87,188 to $119,906; Bonus/Equity: discretionary performance-based bonus; Benefits: medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time
Skills & Requirements
Must-have
SystemVerilog and UVM methodology
RTL simulation and waveform debug
digital design fundamentals
security-related hardware verification
Nice-to-have
formal verification knowledge
AI Agents or copilot utilization
scripting for automation
Key Requirements
2-5 years of experience
Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
Proficiency in SystemVerilog
Familiarity with UVM methodology
Experience with RTL simulation, waveform debug, and EDA verification tools
Solid understanding of digital design fundamentals
Strong analytical, debugging, and problem-solving skills